A CAM with mixed serial-parallel comparison for use in low energy caches.
A novel, low-energy content addressable memory (CAM) structure is presented which achieves an approximately four-fold improvement in energy per access, compared to a standard parallel CAM, when used as tag storage for caches. It exploits the address patterns commonly found in application programs, w...
| 發表在: | IEEE Transactions on VLSI systems 12, 3 (2004). |
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| 格式: | Article |
| 語言: | 英语 |
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