A digit-serial multiplier for finite field GF(2m).
In this paper, an efficient digit-serial systolic array is proposed for multiplication in finite field GF(2m) using the standard basis representation. From the least significant bit first multiplication algorithm, we obtain a new dependence graph and design an efficient digit-serial systolic multipl...
| الحاوية / القاعدة: | IEEE Transactions on VLSI systems 13, 4 (2005). |
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| المؤلف الرئيسي: | |
| التنسيق: | مقال |
| اللغة: | الإنجليزية |
| الموضوعات: |