A digit-serial multiplier for finite field GF(2m).
In this paper, an efficient digit-serial systolic array is proposed for multiplication in finite field GF(2m) using the standard basis representation. From the least significant bit first multiplication algorithm, we obtain a new dependence graph and design an efficient digit-serial systolic multipl...
| Publicat a: | IEEE Transactions on VLSI systems 13, 4 (2005). |
|---|---|
| Autor principal: | |
| Format: | Article |
| Idioma: | anglès |
| Matèries: |