Wire retiming as fixpoint computation.

In system-on-chips (SOCs), a nonnegligible part of operation time is spent on global wires with long delays. Retiming-that is moving flip-flops in a circuit without changing its functionality-can be explored to pipeline long interconnect wires in SOC designs. The problem of retiming over a netlist o...

詳細記述

書誌詳細
出版年:IEEE Transactions on VLSI systems 13, 12 (2005).
第一著者: Chuan Lin
フォーマット: 論文
言語:English
主題: