Wire retiming as fixpoint computation.
In system-on-chips (SOCs), a nonnegligible part of operation time is spent on global wires with long delays. Retiming-that is moving flip-flops in a circuit without changing its functionality-can be explored to pipeline long interconnect wires in SOC designs. The problem of retiming over a netlist o...
| Publié dans: | IEEE Transactions on VLSI systems 13, 12 (2005). |
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| Format: | Article |
| Langue: | English |
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