A compact analytical model for asymmetric single-electron tunneling transistors.

Analytical model for asymmetric single-electron tunneling transistors (SETTs), in which resistance and capacitance parameters of source/drain junctions are not equal, has been developed. The model is based on the steady-state master equation, takes only the two most-probable charging states into acc...

Täydet tiedot

Bibliografiset tiedot

Julkaisussa:	IEEE Transactions on electron devices 50, 2 (2003).
Päätekijä:	Inokawa, H.
Aineistotyyppi:	Artikkeli
Kieli:	englanti
Aiheet:	Coulomb island charge. Coulomb staircase. Asymmetric SETT. Asymmetric single-electron tunneling transistors. Capacitance parameters. Compact analytical model. Drain current-drain voltage characteristic. Drain current-gate voltage characteristics skew. Resistance parameters. Source/drain junctions. Steady-state master equation.