Testing of core-based systems-on-a-chip.

Testing of core-based systems-on-a-chip.

Available techniques for testing of core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesizing low-overhead test architectures and compact test solutions. In this paper, we provide a comprehensive framework that generates low-overhead compact test solutions for SOCs. Firs...

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Bibliografski detalji
Izdano u:IEEE Transactions on computer-aided design of integrated circuits and systems 20, 3 (2001).
Glavni autor: Ravi, S.
Format: Članak
Jezik:English
Teme:
Core access.
Core-based systems-on-a-chip.
Finite-state automata.
Hardware additions.
Hardware behavior.
Low-overhead test architectures.
Register-transfer level circuit.
Satisfiability-based solution.
Symbolic test.
System-level average area overhead.
Test application time reduction.
Testability analysis.
Transparency modes.