Advanced HDL synthesis and SOC prototyping RTL design using verilog
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| Format: | Electronic Resource |
| Jezik: | angleščina |
| Izdano: |
Singapore
Springer
[2019]
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| Izdaja: | First edition. |
| Teme: | |
| Online dostop: | Available for University of the Philippines Diliman via SpringerLink. Click here to access Also available remotely for University of the Philippines Diliman via SpringerLink. Click here to access thru EZproxy |