Digital logic design using Verilog coding and RTL synthesis

Digital logic design using Verilog coding and RTL synthesis

ग्रंथसूची विवरण
मुख्य लेखक: Taraate, Vaibbhav (लेखक)
निगमित लेखक: SpringerLink (Online service)
स्वरूप: Electronic Resource
भाषा:English
प्रकाशित: New Delhi Springer India [2016]
विषय:
Logic design > Data processing.
Verilog (Computer hardware description language)
Electronic books.
ऑनलाइन पहुंच:Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy