A method for timing closure in supply voltage scaled CMOS digital circuits with dual-Vth devices
| Κύριος συγγραφέας: | |
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| Μορφή: | Thesis |
| Γλώσσα: | Αγγλικά |
| Έκδοση: |
Quezon City
College of Engineering, University of the Philippines Diliman
2013
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| Θέματα: |