The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

Bibliografiska uppgifter
Huvudupphovsman: Jespers, Paul G.
Materialtyp: Bok
Språk:English
Publicerad: New York Springer 2010.
Serie:Analog circuits and signal processing series.
Ämnen:
Metal oxide semiconductors, Complementary > Design and construction.
Low voltage integrated circuits > Design and construction.
Linear integrated circuits > Design and construction.