The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

Bibliografische gegevens
Hoofdauteur: Jespers, Paul G.
Formaat: Boek
Taal:English
Gepubliceerd in: New York Springer 2010.
Reeks:Analog circuits and signal processing series.
Onderwerpen:
Metal oxide semiconductors, Complementary > Design and construction.
Low voltage integrated circuits > Design and construction.
Linear integrated circuits > Design and construction.