The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

The gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches

מידע ביבליוגרפי
מחבר ראשי: Jespers, Paul G.
פורמט: ספר
שפה:English
יצא לאור: New York Springer 2010.
סדרה:Analog circuits and signal processing series.
נושאים:
Metal oxide semiconductors, Complementary > Design and construction.
Low voltage integrated circuits > Design and construction.
Linear integrated circuits > Design and construction.