An asynchronous ternary logic signaling system.

This paper presents a new approach to an on-chip asynchronous transmission system suitable for next generation asynchronous on-chip networks. It implements multivalued logic to reduce the number of wires and a low-voltage swing for lower dynamic power dissipation. Furthermore, the transmission syste...

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書誌詳細

出版年:	IEEE Transactions on VLSI systems 11, 6 (2003).
第一著者:	Felicijan, T.
フォーマット:	論文
言語:	English
主題:	Asynchronous ternary logic signaling. Asynchronous transmission system. Classical dual-rail signaling system. Dynamic power dissipation. Logic signaling system. Long on-chip interconnection. Low-voltage swing. Power consumption. Reliability. Simulation. Transmission system. Transmitter circuit.