An asynchronous ternary logic signaling system.
This paper presents a new approach to an on-chip asynchronous transmission system suitable for next generation asynchronous on-chip networks. It implements multivalued logic to reduce the number of wires and a low-voltage swing for lower dynamic power dissipation. Furthermore, the transmission syste...
| 發表在: | IEEE Transactions on VLSI systems 11, 6 (2003). |
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| 主要作者: | |
| 格式: | Article |
| 語言: | English |
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