An asynchronous ternary logic signaling system.

This paper presents a new approach to an on-chip asynchronous transmission system suitable for next generation asynchronous on-chip networks. It implements multivalued logic to reduce the number of wires and a low-voltage swing for lower dynamic power dissipation. Furthermore, the transmission syste...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on VLSI systems 11, 6 (2003).
Päätekijä: Felicijan, T.
Aineistotyyppi: Artikkeli
Kieli:English
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