Gate oxide leakage current analysis and reduction for VLSI circuits.

Gate oxide leakage current analysis and reduction for VLSI circuits.

In this paper we address the growing issue of gate oxide leakage current (Igate) at the circuit level. Specifically, we develop a fast approach to analyze the total leakage power of a large circuit block, considering both Igate and subthreshold leakage (Isub). The interaction between Isub and Igate...

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Bibliographic Details
Published in:IEEE Transactions on VLSI systems 12, 2 (2004).
Main Author: Dongwoo Lee
Format: Article
Language:English
Subjects:
SPICE.
VLSI circuits.
Arbitrary CMOS topologies.
Benchmark circuits.
Branch-and-bound approach.
Fast approach.
Gate oxide leakage current analysis.
Large circuit block.
Leakage current reduction.
Lookup tables.
Pin reordering.
Subthreshold leakage.
Total leakage power.