Leakage current reduction in CMOS VLSI circuits by input vector control.

The first part of this paper describes two runtime mechanisms for reducing the leakage current of a CMOS circuit. In both cases, it is assumed that the system or environment produces a "sleep" signal that can be used to indicate that the circuit is in a standby mode. In the first method, t...

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发表在:	IEEE Transactions on VLSI systems 12, 2 (2004).
主要作者:	Abdollahi, A.
格式:	文件
语言:	英语
主题:	CMOS VLSI circuits. MCNC91 benchmark. Combinational circuits. Flip-flops. Input vector control. Internal signals controllability. Leakage current reduction. Low power design. Minimum leakage vector. Runtime mechanisms. Scan registers. Sequential circuit. Stack effect.