Statistical analysis of subthreshold leakage current for VLSI circuits.
We develop a method to estimate the variation of leakage current due to both intra-die and inter-die gate length process variability. We derive an analytical expression to estimate the probability density function (PDF) of the leakage current for stacked devices found in CMOS gates. These distributi...
| Publicat a: | IEEE Transactions on VLSI systems 12, 2 (2004). |
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| Autor principal: | |
| Format: | Article |
| Idioma: | English |
| Matèries: |