The effect of LUT and cluster size on deep-submicron FPGA performance and density.

In this paper, we revisit the field-programmable gate-array (FPGA) architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cluster-based island-style FPGAs (Betz et al. 1997) we look at the effect of lookup table...

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Foilsithe in:	IEEE Transactions on VLSI systems 12, 3 (2004).
Príomhchruthaitheoir:	Ahmed, E.
Formáid:	Alt
Teanga:	Béarla
Ábhair:	CAD. FPGA density. VLSI. Area delay product. Benchmark circuits. Cluster based island style FPGA. Cluster size effect. Computer aided design. Deep submicron FPGA performance. Field programmable gate array. Flip-flops. Logic block architectures. Lookup table size effect. Very large scale integrated circuits.