Compiler-directed scratch pad memory optimization for embedded multiprocessors.

This paper presents a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we propose an optimization algorithm that targets at reducing extra off-chip memory accesses caused by interprocessor communication...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	IEEE Transactions on VLSI systems 12, 3 (2004).
1. Verfasser:	Kandemir, M.
Format:	Artikel
Sprache:	English
Schlagworte:	Compiler. Data accesses. Embedded multiprocessors. Energy delay product reduction. Image processing applications. Interprocessor communication. Interprocessor data sharing. Offchip memory accesses. Scratch pad memory optimization.