Interconnect-based system-level energy and power prediction to guide architecture exploration.

We present a novel technique to predict energy and power consumption in an electronic system, given its behavioral specification and library components. The early prediction gives circuit designers the freedom to make numerous high-level choices (such as die size, package type, and latency of the pi...

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发表在:IEEE Transactions on VLSI systems 12, 4 (2004).
主要作者: Wadekar, S.A
格式: 文件
语言:English
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