Small area parallel Chien search architectures for long BCH codes.
To implement parallel BCH (Bose-Chaudhuri-Hochquenghem) decoders in an area-efficient manner, this paper presents a novel group matching scheme to reduce the Chien search hardware complexity by 60% for BCH(2047, 1926, 23) code as opposed to only 26% if directly applying the iterative matching algori...
| izdano v: | IEEE Transactions on VLSI systems 12, 5 (2004). |
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| Glavni avtor: | |
| Format: | Article |
| Jezik: | English |
| Teme: |