Distributed sleep transistor network for power reduction.
Sleep transistors are effective to reduce leakage power during standby modes. The cluster-based design was proposed to save sleep transistor area by clustering gates to minimize the simultaneous switching current per cluster and inserting a sleep transistor per cluster. In this paper, we propose a n...
Published in: | IEEE Transactions on VLSI systems 12, 9 (2004). |
---|---|
Main Author: | |
Format: | Article |
Language: | English |
Subjects: |