Heydari, P. Design of ultrahigh-speed low-voltage CMOS CML buffers and latches. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationHeydari, P. "Design of Ultrahigh-speed Low-voltage CMOS CML Buffers and Latches." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationHeydari, P. "Design of Ultrahigh-speed Low-voltage CMOS CML Buffers and Latches." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.