封面圖片

Ultralow-power adiabatic circuit semi-custom design.

This brief shows that a conventional semi-custom design-flow based on a positive feedback adiabatic logic (PFAL) cell library allows any VLSI designer to design and verify complex adiabatic systems (e.g., arithmetic units) in a short time and easy way, thus, enjoying the energy reduction benefits of...

全面介紹

書目詳細資料
發表在:IEEE Transactions on VLSI systems 12, 11 (2004).
主要作者: Blotti, A.
格式: Article
語言:英语
主題:
0.6 micron.
10 MHz.
100 MHz.
CMOS technology.
VLSI designer.
Carry lookahead adders.
Complex adiabatic systems.
Energy reduction.
Energy saving.
Parallel multipliers.
Positive feedback adiabatic logic.
Post layout simulations.
Power clock generation.
Semicustom adiabatic arithmetic units.
Semicustom design.
Static CMOS implementation.
Ultralow power adiabatic circuit design.