CAD for nanometer silicon design challenges and success.

CAD for nanometer silicon design challenges and success.

As silicon CMOS technology is scaled into the nanometer regime, the paradigm shift of computer-aided design (CAD) technology is indispensable to cope with two major challenges (i.e., the ever-increasing design complexity of gigascale integration and complicated physical effects inherent from the nan...

Disgrifiad llawn

Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Transactions on VLSI systems 12, 11 (2004).
Prif Awdur: Jeong-Taek Kong
Fformat: Erthygl
Iaith:English
Pynciau:
Si.
Abstraction.
Computer-aided design.
Gigascale integration.
Leakage power.
Manufacturing aware design techniques.
Nanometer silicon design.
Nanoscale physical effects.
Nanoscale technology.
Planarity control.
Process variability.
Reliability.
Resolution enhancement.
Signal integrity.
Silicon CMOS technology.
Statistical design.
System level design.
System level verification.
Technology CAD.