CAD for nanometer silicon design challenges and success.
As silicon CMOS technology is scaled into the nanometer regime, the paradigm shift of computer-aided design (CAD) technology is indispensable to cope with two major challenges (i.e., the ever-increasing design complexity of gigascale integration and complicated physical effects inherent from the nan...
| Gepubliceerd in: | IEEE Transactions on VLSI systems 12, 11 (2004). |
|---|---|
| Hoofdauteur: | |
| Formaat: | Artikel |
| Taal: | English |
| Onderwerpen: |