Bus-switch coding for reducing power dissipation in off-chip buses.
We present a novel coding scheme for reducing bus power dissipation. The presented approach is well suited to driving off-chip buses, where the line capacitance is a dominant factor. A distinctive feature of the technique is the dynamic reordering of bus line positions, in order to minimize the togg...
| Publicado no: | IEEE Transactions on VLSI systems 12, 12 (2004). |
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| Autor principal: | |
| Formato: | Artigo |
| Idioma: | inglês |
| Assuntos: |