Layout techniques for FPGA switch blocks.

This paper presents abstract layout techniques for a variety of field-programmable gate array switch block architectures. For subset switch blocks of small size, we find the optimal implementations using a simple metric. We also develop a tractable heuristic that returns the optimal results for smal...

詳細記述

書誌詳細
出版年:IEEE Transactions on VLSI systems 13, 1 (2005).
第一著者: Schmit, H.
フォーマット: 論文
言語:English
主題: