Layout techniques for FPGA switch blocks.

This paper presents abstract layout techniques for a variety of field-programmable gate array switch block architectures. For subset switch blocks of small size, we find the optimal implementations using a simple metric. We also develop a tractable heuristic that returns the optimal results for smal...

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Detalles Bibliográficos
Publicado en:IEEE Transactions on VLSI systems 13, 1 (2005).
Autor principal: Schmit, H.
Formato: Artículo
Lenguaje:English
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