Layout techniques for FPGA switch blocks.

Layout techniques for FPGA switch blocks.

This paper presents abstract layout techniques for a variety of field-programmable gate array switch block architectures. For subset switch blocks of small size, we find the optimal implementations using a simple metric. We also develop a tractable heuristic that returns the optimal results for smal...

Disgrifiad llawn

Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Transactions on VLSI systems 13, 1 (2005).
Prif Awdur: Schmit, H.
Fformat: Erthygl
Iaith:English
Pynciau:
FPGA switch blocks.
Field-programmable gate array switch block architectures.
Layout methodologies.
Subset architectures.
Subset switch blocks.
Tractable heuristic.
Universal switch blocks.