Layout techniques for FPGA switch blocks.
This paper presents abstract layout techniques for a variety of field-programmable gate array switch block architectures. For subset switch blocks of small size, we find the optimal implementations using a simple metric. We also develop a tractable heuristic that returns the optimal results for smal...
| में प्रकाशित: | IEEE Transactions on VLSI systems 13, 1 (2005). |
|---|---|
| मुख्य लेखक: | |
| स्वरूप: | लेख |
| भाषा: | English |
| विषय: |