Efficient algorithms for multilevel power estimation of VLSI circuits.
This paper presents a methodology for calculating highly accurate mean power estimates for integrated digital CMOS circuits. A complementary calibration scheme for ASIC library cells to extract the power relevant parameters is proposed. The circuit models presented allows the prediction of mean powe...
| Yayımlandı: | IEEE Transactions on VLSI systems 13, 2 (2005). |
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| Materyal Türü: | Makale |
| Dil: | English |
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