Simultaneous Vt selection and assignment for leakage optimization.
This paper presents a novel approach for leakage optimization through simultaneous Vt selection and assignment. Vt selection implies deciding the right value for Vt and assignment implies deciding which gates should be assigned a particular threshold voltage. We also include the effect of variabilit...
| Pubblicato in: | IEEE Transactions on VLSI systems 13, 6 (2005). |
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| Autore principale: | |
| Natura: | Articolo |
| Lingua: | inglese |
| Soggetti: |