Wrapper design for multifrequency IP cores.

This paper addresses the testability problems raised by intellectual property cores with multiple clock domains. The proposed solution is based on a novel core wrapper architecture and a new wrapper design algorithm. It is shown how multifrequency at-speed test response capture can be achieved via t...

全面介紹

書目詳細資料
發表在:IEEE Transactions on VLSI systems 13, 6 (2005).
主要作者: Qiang Xu
格式: Article
語言:英语
主題: