Function-based compact test pattern generation for path delay faults.
We present a function-based nonenumerative automatic test pattern generation (ATPG) methodology for detecting path delay faults (PDFs). The proposed technique consists of a number of topological circuit traversals during each a linear number of Boolean functions is generated per circuit line. From e...
| הוצא לאור ב: | IEEE Transactions on VLSI systems 13, 8 (2005). |
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| מחבר ראשי: | |
| פורמט: | Article |
| שפה: | English |
| נושאים: |