Function-based compact test pattern generation for path delay faults.

Function-based compact test pattern generation for path delay faults.

We present a function-based nonenumerative automatic test pattern generation (ATPG) methodology for detecting path delay faults (PDFs). The proposed technique consists of a number of topological circuit traversals during each a linear number of Boolean functions is generated per circuit line. From e...

Disgrifiad llawn

Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Transactions on VLSI systems 13, 8 (2005).
Prif Awdur: Michael, M.K
Fformat: Erthygl
Iaith:English
Pynciau:
ATPG.
Boolean function.
Boolean/algebraic test generation.
PDF.
Automatic test pattern generation.
Binary decision diagram.
Path delay fault.
Test compaction.
Test efficiency.