InvMixColumn decomposition and multilevel resource sharing in AES implementations.

Hardware implementations of cryptography face increasingly more stringent demands for lower cost and greater computational power. In order to meet those demands, more efficient approaches to implementations are needed. This paper presents detailed studies of MixColumn and InvMixColumn operations use...

Szczegółowa specyfikacja

Opis bibliograficzny
Wydane w:	IEEE Transactions on VLSI systems 13, 8 (2005).
1. autor:	Fischer, V.
Format:	Artykuł
Język:	English
Hasła przedmiotowe:	AES implementation. FPGA. InvMixColumn decomposition. InvMixColumn operation. MixColumn operation. VLSI. Advanced encryption standard. Cryptography. Field-programmable gate array. Hardware architecture. Mathematical analysis. Multilevel resource sharing. Parallel decomposition. Reconfigurable logic area. Serial decomposition.