APA ציטוט

Egan, T. Design-for-testability for embedded delay-locked loops. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Egan, T. "Design-for-testability for Embedded Delay-locked Loops." IEEE Transactions on VLSI Systems .

ציטוט MLA

Egan, T. "Design-for-testability for Embedded Delay-locked Loops." IEEE Transactions on VLSI Systems, .