Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time.

Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time.

The detection of robustly detectable sequential faults has been extensively studied. A number of researchers have provided theoretical as well as experimental results designating that the application of single input change (SIC) pairs of test patterns results in favorable results for sequential faul...

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Bibliographic Details
Published in:IEEE Transactions on VLSI systems 13, 9 (2005).
Main Author: Voyiatzis, I.
Format: Article
Language:English
Subjects:
ARN.
DSP cores.
SIC pairs.
Accumulator-based test generation.
Barrel shifter.
Built-in testing.
Circuits testing.
Delay fault testing.
Digital signal processors.
Microprocessors.
Sequential fault testing.
Sequential faults detection.
Stuck-open testing.
Test patterns generation.
Two-pattern testing.