Pipelining with common operands for power-efficient linear systems.
We propose a systematic pipelining method for a linear system to minimize power and maximize throughput, given a constraint on the number of pipeline stages and a set of resource constraints. Unlike most existing pipelining approaches, our method takes the number of pipeline stages as one of the con...
| Published in: | IEEE Transactions on VLSI systems 13, 9 (2005). |
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| Main Author: | |
| Format: | Article |
| Language: | English |
| Subjects: |