Parallel high-throughput limited search trellis decoder VLSI design.

Parallel high-throughput limited search trellis decoder VLSI design.

Limited search trellis decoding algorithms have great potentials of realizing low power due to their largely reduced computational complexity compared with the widely used Viterbi algorithm. However, because of the lack of operational parallelism and regularity in their original formulations, the li...

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Bibliografski detalji
Izdano u:IEEE Transactions on VLSI systems 13, 9 (2005).
Glavni autor: Fei Sun
Format: Članak
Jezik:English
Teme:
T-algorithm.
VLSI.
Viterbi algorithm.
Viterbi decoder.
Computational complexity.
Convolutional code decoding.
Hardware architecture codesign.
Limited search decoding algorithms.
Operational parallelism.
Parallel SPEC-T decoder architecture.
Parallel architecture.
Switching activities.
Trellis decoder.