Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints.

Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints.

Scheduling and binding are two tasks found in high-level synthesis of hardware as well as in compiling software. These tasks are realized on graphs that are models of the hardware or of the software to be compiled to run on a specific processor. Scheduling focuses on determining the start execution...

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Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Transactions on VLSI systems 13, 10 (2005).
Prif Awdur: Chabini, N.
Fformat: Erthygl
Iaith:English
Pynciau:
NP-hard problems.
Cyclic graphs.
Graph nodes.
High-level synthesis.
Low power design.
Modulo scheduling.
Power consumption.
Processor scheduling.
Resource constraints.
Switching activities.
Timing constraints.