A novel high-speed sense-amplifier-based flip-flop.

A new sense-amplifier-based flip-flop is presented. The output latch of the proposed circuit can be considered as an hybrid solution between the standard NAND-based set/reset latch and the NC-2MOS approach. The proposed flip-flop provides ratioless design, reduced short-circuit power dissipation, an...

Täydet tiedot

Bibliografiset tiedot

Julkaisussa:	IEEE Transactions on VLSI systems 13, 11 (2005).
Päätekijä:	Strollo, A.G.M
Aineistotyyppi:	Artikkeli
Kieli:	English
Aiheet:	0.25 micron. CMOS digital integrated circuits. Clock-to-output delay. Glitch-free operation. High-speed direct digital frequency synthesizer chip. High-speed flip-flop. Sense amplifiers. Set-reset latches. Short-circuit power dissipation reduction.