A novel high-speed sense-amplifier-based flip-flop.

A novel high-speed sense-amplifier-based flip-flop.

A new sense-amplifier-based flip-flop is presented. The output latch of the proposed circuit can be considered as an hybrid solution between the standard NAND-based set/reset latch and the NC-2MOS approach. The proposed flip-flop provides ratioless design, reduced short-circuit power dissipation, an...

Ausführliche Beschreibung

Bibliographische Detailangaben
Veröffentlicht in:IEEE Transactions on VLSI systems 13, 11 (2005).
1. Verfasser: Strollo, A.G.M
Format: Artikel
Sprache:English
Schlagworte:
0.25 micron.
CMOS digital integrated circuits.
Clock-to-output delay.
Glitch-free operation.
High-speed direct digital frequency synthesizer chip.
High-speed flip-flop.
Sense amplifiers.
Set-reset latches.
Short-circuit power dissipation reduction.