A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors.

A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors.

すべてのバージョン（2件）を表示する

Devices that combine single-electron and metal-oxide-semiconductor (MOS) transistors are newly proposed as basic components of multiple-valued (MV) logic, such as a universal literal gate and a quantizer. We verified their operation using single-electron and MOS transistors fabricated on the same wa...

詳細記述

書誌詳細
出版年:IEEE Transactions on electron devices 50, 2 (2003).
第一著者: Inokawa, H.
フォーマット: 論文
言語:English
主題:
ADC.
LSI.
MOS transistor.
SET-MOSFET hybrid circuits.
Analog-to-digital converter.
Combined SET/MOSFET.
Large-scale integrated circuits.
Multiple-valued SRAM.
Multiple-valued adder.
Multiple-valued logic.
Multiple-valued memory.
Pattern-dependent oxidation.
Quantizer.
Single-electron transistor.
Static random-access memory.
Universal literal gate.