A compact analytical model for asymmetric single-electron tunneling transistors.
Analytical model for asymmetric single-electron tunneling transistors (SETTs), in which resistance and capacitance parameters of source/drain junctions are not equal, has been developed. The model is based on the steady-state master equation, takes only the two most-probable charging states into acc...
| Argitaratua izan da: | IEEE Transactions on electron devices 50, 2 (2003). |
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| Formatua: | Artikulua |
| Hizkuntza: | ingelesa |
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