Impact of interfacial layer and transition region on gate current performance for high-K gate dielectric stack its tradeoff with gate capacitance.

Stacked gate dielectrics are modeled with respect to the impact on the leakage current of interfacial layers and transition regions, considering the tradeoff with the gate capacitance. A Franz 2-band dispersion model is used. Low-EOT and low-gate-current regimes are explored theoretically using reas...

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Detalhes bibliográficos
Publicado no:IEEE Transactions on electron devices 50, 2 (2003).
Autor principal: Yang-Yu Fan
Formato: Artigo
Idioma:English
Assuntos: