System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints.

System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints.

Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource conflicts, and limit power dissipation during test mode. In this paper, we present an integrated approach to several test...

पूर्ण विवरण

ग्रंथसूची विवरण
में प्रकाशित:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 9 (2002).
मुख्य लेखक: Iyengar, V.
स्वरूप: लेख
भाषा:English
विषय:
SOCs.
Desirable orderings.
Embedded core testing.
Heuristic algorithm.
Polynomial time.
Power constraints.
Power dissipation.
Precedence relationships.
Preemption.
System-on-a-chip test automation.
Test resource conflicts.
Test schedules.